Click Tools > Qsys

Right-click the clk_0 then select Rename.

Type "clk_50" then press Enter.

In the left side Component Library tree, select Library > Embedded Processors > Nios II Processor and click the Add... button to open the Nios II component wizard as shown below.

Click Finish to return to main window as shown below.

Select nios2_qsys_0 then rename the processor name to cpu as shown below.

Add the JTAG component by selecting Library > Interface Protocols > Serial > JTAG UART and clicking the Add... button as shown below.

We are going to use the default settings as shown below, so click Finish to close the wizard and return to the window as shown below.

Select the jtag_uart_0 component and rename it to jtag_uart as shown below.

Add the Library > Memories and Memory Controllers > On-Chip > On-Chip Memory (RAM or ROM) component to system as shown below.

Modify Total memory size setting to 26000 as shown below.

Click Finish to return to the main window as shown below.

Rename onchip_memory2_0 to onchip_memory2 as shown below.

Add the Library > Peripherals > Microcontroller Peripherals > PIO (Parallel I/O) component to the system as shown below.

Click Finish to use the default settings for this component. This closes the PIO wizard and returns to the window as shown below.

Rename pio_0 to pio_led as shown below.

CONNECTING THE COMPONENTS

Click the 4 nodes connecting the clk_50 clk, cpu clk, jtag_uart clk, onchip_memory clk1 and pio_led clk as shown below.

Click the 4 nodes connecting the clk_50 clk_reset, cpu reset_n, jtag_uart reset, onchip_memory reset1 and pio_led reset as shown below.

Click the 2 nodes connecting the cpu data_master and instruction_master to the onchip_memory s1 as shown below.

Click the 2 nodes connecting the cpu data_master to the jtag_uart avalon_jtag_slave and to the pio_led s1 as shown below.

Lastly, click the node connecting the clk_50 clk_in_reset to the cpu jtag_debug_module_reset as shown below.

CPU RESET AND EXCEPTION VECTOR

Double click the cpu on the table and select the onchip_memory.s1 as the Reset vector memory and Exception vector memory as shown below.

Click Finish to return to the window as shown below.

BASE ADDRESS ASSIGNMENT

Click System > Assign Base Addresses as shown below.

Note that there are no more errors on the Messages window as shown below. Only 2 warnings.

LED CONNECTION

Double click the pio_led external_connection Export column as shown below.

SAVE AND GENERATE THE QSYS PROJECT

Click File > Save and the name as de0_nano as shown below.

c

Click Save. The on the main window, go to the Generate tab and click Generate button as shown below.

You should be able to have the result with 0 Errors, 42 Warnings as shown below.

Click Close to close the Generate Completed dialog box and click File > Exit to close the Qsys and return to the window as shown below.

ADD THE PROCESSOR TO THE MAIN PROJECT

Click the Files tab on the Project Navigator section and then double click the Files icon as shown below.

You should see the Settings - myfirst_niosii as shown below. Click the browse button.

In the Select File dialog as shown below, go to the de0_nano > synthesis directory. Select All Files as type then select the de0_nano.qip.

Click Open to return to the Settings dialog box. Click Add button as shown below.

Click Apply then click OK. The new file should be included as shown in the main window below.

Right click on the new file then click Set as Top-Level Entity as shown below.

Click the Start Analysis and Synthesis button as shown below.

When done, a dialog containing Analysis & Synthesis was successful (14 warnings) should appear as shown below. Click OK.

ASSIGN THE LED PINS OF THE PROCESSOR

Click the Pin Planner button as shown below.

In the Pin Planner, type the FPGA pin locations of the 8 LEDs as shown below. Close the window afterwards.

Click the Start Compilation button as shown below.

When done, a dialog with text Full Compilation was successful (38 warnings) should appear as shown below. Click OK button.

DOWNLOAD THE HARDWARE DESIGN

Connect the De0-Nano board to the PC.

Click the Programmer button as shown below. 

Click the Hardware Setup... button as shown below.

In the Hardware Setup dialog box, select the US-Blaster as shown below. Click Close.

Confirm that the USB-Blaster [USB-0] appears as the hardware as shown below. Click the myfirst_niosii_time_limited.sof in the table then click Start button.

After successful uploading, the OpenCore Plus Status dialog will appear as shown below.

The status of the 8 LEDs are also off as shown below.

CREATE AND UPLOAD THE SOFTWARE USING ECLIPSE

Go back to the Quartus IDE and click Tools > Nios II Software Build Tools for Eclipse as shown below.

If a dialog box appears to select a workspace as shown below, just click OK.

At the Nios II - Eclipse IDE environment, select File > New > Nios II Application and BSP from Template as shown below.

At the Nios II Application and BSP from Template dialog box, enter the following below then click Finish.

At the Project Explorer pane, right click hello_world_0 then click Build Project as shown below.

Wait until build finished is displayed on the Console panel as shown below.

At the Project Explorer pane, right-click hellow_world_0 and select Run As > 3 Nios II Hardware as shown below. 

Wait until A Nios II Console pane that displays "Hello from Nios II" appears as shown below.

At the Project Explorer pane, double click hello_world_small.c to open the file.